sci-electronics/verilator: bump to 4.200

Package-Manager: Portage-3.0.18, Repoman-3.0.3
Signed-off-by: Huang Rui <vowstar@gmail.com>
This commit is contained in:
Huang Rui 2021-04-05 09:38:52 +08:00
parent dd17b35082
commit da5cbbe307
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2 changed files with 43 additions and 0 deletions

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DIST verilator-4.110.tar.gz 2227322 BLAKE2B 2032f70771fbb2a6f93f504d6b1a01ed5c5fa1f752d3834d8a5acf29190bd614ad3200452fa2ac7cfdc3f6d3baaf1c2e6b9cb32fdf23e43bca5beb19c86ac85b SHA512 c424650dac9ea15ff0d6387614e9a8b5b5a87514c92541af6838ef5a3d22f32d23cc339a9274ff7122d32f4aa368c773cf2dc4e1178dada6a34bad02103d237d
DIST verilator-4.200.tar.gz 2245877 BLAKE2B e0606966777c9d3c364bc6d6e84a246a27f4ad4ee67871194a4738cf2c3f76529fe23d2a555139bc9b8eba268ed1929b651a161a7434dd380ec9762cb907f43e SHA512 f2fac4c46006c064b4a31b0edf0c3b1aebdea7e158ca6f8445ae3ece97f1132cd95dbfd63dc5e0f0cb4566a839f44ae0547e0e604cdd3231cf79a7400353fbb5

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# Copyright 1999-2021 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI="7"
inherit autotools
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
HOMEPAGE="
https://verilator.org
https://github.com/verilator/verilator
"
if [[ "${PV}" == "9999" ]] ; then
inherit git-r3
EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
else
SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
fi
LICENSE="|| ( Artistic-2 LGPL-3 )"
SLOT="0"
RDEPEND="
dev-lang/perl
sys-libs/zlib
"
DEPEND="
${RDEPEND}
"
BDEPEND="
sys-devel/bison
sys-devel/flex
"
src_prepare() {
default
eautoconf --force
}