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sci-electronics/verilator: add 4.228

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Signed-off-by: Huang Rui <vowstar@gmail.com>
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Huang Rui 2022-10-25 09:24:13 +08:00
parent 3e998a1d48
commit c68f548bcf
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sci-electronics/verilator/Manifest
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DIST verilator-4.226.tar.gz 2605577 BLAKE2B 2a93e7bcbf9c87baca97e887b7460e4735fb60809b2cf636a7a235b07c7528667ec2586e2bd405aeb7b247028f2ea09a75861305aefe0d05b9e779f7c23686c4 SHA512 bede9024f45491884533929aa04705908aaf9fda5848a8ee7ca865569b2e5c9267ba20d8e140e67d86f322f7c7cf6d4562014f00e826ec69c8c39a3a3644c5c3
DIST verilator-4.228.tar.gz 2623600 BLAKE2B 340807f3115799341561c3b62380d1c0f63a0628dfd609576b4fe84688ad964fc4d70764af0816ef68d855e8d264e40b71e28c2e5a26267c7ee21064035c5b8a SHA512 8d8c5382c03f3a390a5ce5e60846c69f19bc5b1b0861951fe7633de3378e4affc1b15b1a0f2729c0b0cc8c4c9a8b0e9115a95bc455c0d47b333091afbf06eced

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sci-electronics/verilator/verilator-4.228.ebuild Normal file
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# Copyright 1999-2022 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
EAPI="8"
inherit autotools
DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
HOMEPAGE="
https://verilator.org
https://github.com/verilator/verilator
"
if [[ "${PV}" == "9999" ]] ; then
inherit git-r3
EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
else
SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
fi
LICENSE="|| ( Artistic-2 LGPL-3 )"
SLOT="0"
RDEPEND="
dev-lang/perl
sys-libs/zlib
"
DEPEND="
${RDEPEND}
"
BDEPEND="
sys-devel/bison
sys-devel/flex
"
src_prepare() {
default
eautoconf --force
}