sci-electronics/verilator: bump to 4.104

Package-Manager: Portage-3.0.9, Repoman-3.0.2
Signed-off-by: Huang Rui <vowstar@gmail.com>

sci-electronics/verilator/Manifest

@@ -1 +1,2 @@
 DIST verilator-4.102.tar.gz 2128472 BLAKE2B 5dabc2e0a74f336da84ff4006a63408d127e26996e4a6f454b2b1fa98e98792b5ab5dbc41e25db0a72b58e0b0352c58bb34868ddf0ee9234bce8569666a7d1b0 SHA512 85ccd09eaaa72d6afd5b68027d5cdec1d3223a81b51e13e3de794d301cb086ee3283b18d96c38f67908c3fe9a73b26172afbf7ce5cc3fd38874b631029b31997
+DIST verilator-4.104.tar.gz 2149138 BLAKE2B 4233a04f77135276dcae17b220683ee31296c9e5ba3f4fdeac7413aa9907b8a06c1b10de10f4444912ec3653d3b4f5074e5060dc418c3264357014543fcbb2b3 SHA512 14e64768956056b12e5dd96031cc905b8022ca6e29e174108394df433d0efbac0e76c3751fc09699d7b972d58268ba55a8354c1bd9b9be4e385e0f86bc61d3c8

sci-electronics/verilator/verilator-4.104.ebuild

@@ -0,0 +1,42 @@
+# Copyright 1999-2020 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI="7"
+
+inherit autotools
+
+DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
+HOMEPAGE="
+	https://verilator.org
+	https://github.com/verilator/verilator
+"
+
+if [[ "${PV}" == "9999" ]] ; then
+	inherit git-r3
+	EGIT_REPO_URI="https://github.com/${PN}/${PN}.git"
+else
+	SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> ${P}.tar.gz"
+	KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
+fi
+
+LICENSE="|| ( Artistic-2 LGPL-3 )"
+SLOT="0"
+
+RDEPEND="
+	dev-lang/perl
+	sys-libs/zlib
+"
+
+DEPEND="
+	${RDEPEND}
+"
+
+BDEPEND="
+	sys-devel/bison
+	sys-devel/flex
+"
+
+src_prepare() {
+	default
+	eautoconf --force
+}